Mixed signal ICs often require integrated resistors for proper circuit operation. Typically such resistors comprised doped polycrystalline silicon. Metal oxide semiconductor (MOS) transistors, which are also present on the mixed signal ICs, have a gate electrode that also can comprise doped polycrystalline silicon. To lower the resistances present in the MOS transistor a metal silicide layer can be formed on the polysilicon gate electrode of the MOS transistor.
To enable contact with metal electrodes and reduce the contact resistance, metal silicide layers are also formed on the source and drain regions of the MOS transistor and the doped polycrystalline silicon resistors to form what can be referred to as silicide block poly resistors (SIBLK poly resistors). The metal silicide layer can be formed across the top of the doped polycrystalline silicon or be blocked from formation across the top of the doped polycrystalline silicon. This metal silicide option enables two different types of polycrystalline silicon resistors.
The first type with the metal silicide layer across the top of the doped polycrystalline silicon is referred as a “silicided polycrystalline silicon resistor”, and the electrical conduction of this resistor is via the metal silicide layer. The second type without the metal silicide layer across the top of the doped polycrystalline silicon is referred as a silicide block polycrystalline silicon resistors (SIBLK poly resistor). The electrical conduction for the second type is by the polycrystalline silicon, thus depending on the doping into the polycrystalline silicon. For proper contact of the SIBLK poly resistor to the metal interconnect, “heads” of the SIBLK poly resistor are provided that include a metal silicide strip on top of the polycrystalline silicon poly in the head regions to provide the first and second contacts.
A typical SIBLK poly resistor thus comprises three parts, a first head, the body, and a second head. The resistor body is strictly blocked from metal silicide layer formation on top. The head receives metal silicide to enable contact to the metal interconnect. Significant parameters for SIBLK poly resistors are body sheet resistance (Rsh), thermal coefficient of resistance (TCR), and head resistance (Rhead). In addition to the Rsh it is generally desirable for the SIBLK poly resistors to exhibit a low thermal coefficient of resistance (TCR) allowing proper IC operation over a wide range of temperature (e.g., −50° C. to 150° C.). Doping of the SIBLK poly resistor is known to influence the SIBLK poly resistor's TCR and Rsh.
To minimize processing steps and thus cycle time and expense, a single-step ion implant (boron for P+ doping or phosphorous for N+ doping) that provides the source/drain doping for the p-channel metal-oxide-semiconductor (PMOS) transistors or n-channel MOS (NMOS) transistors is generally used to also simultaneously dope the SIBLK poly resistors. To minimize processing steps and thus cycle time and expense, as an alternative option, a single-step pre-gate doping, such as an n-poly implant (e.g., phosphorus) used for the poly gates of the NMOS or p-poly (e.g., boron) for the poly gates of the PMOS can also be used to dope the SIBLK poly resistor.
However, due to use of a single shared step implant for the PMOS or NMOS transistors and SIBLK poly resistors, current IC manufacturing methods impose a tradeoff between SIBLK poly resistor properties (e.g., Rsh and TCR) and MOS transistor performance (e.g., gate leakage at “on” state, Idrive, and total leakage at “off” state (Ioff)). Although the implants for the SIBLK poly resistor and source/drains for the MOS transistor can be separate implants to eliminate this tradeoff in properties by using additional masks, the extra processing results in added cycle time and expense.